Decided to take a break from code today, and play with some analog.
I configured an FPGA as a DDS oscillator bank that outputs sine waves from a ROM LUT as 1 bit PDM at 25MHz
Each of those is fed into an RC LPF prefilter, AC coupling/HPF, into opamp sallen key LPFs on bipolar 12V rails so it biases around zero. basically a discrete sigma-delta DAC.
From there, it feeds into an opamp summing node to superimpose them, then into an AD633 multiplier as a square circuit to full wave rectify (absolute value), and then an RC envelope follower.
As the waves become more phase coherent, constructive interference causes amplitude to rise and the envelope smooths it out.
Next up adding some OTA integrators for some nonlinear fun and temporal state, and comparators for spike feedback into FPGA capture timers