"Towards a European Open Infrastructure: Insights from HIGHER, CAPE, and CHORYS" will be presented by Jens Hagemeyer, Manolis Marazakis, and Philippe Bonnet 🗓️ Thursday, April 30 | 13:35–13:50 | Level P1 – Room 133 134 See you in Barcelona!

As #HiPEAC26 comes to a close, a big thanks to the speakers of the CompContinuum workshop: Ramon Canal @VitaminVProject, Stratos Psomadakis @AERO_Project_EU, Ivy Peng @OpenCUBE_EU, Leonidas Kosmidis @pqc4emrtd, and our own Manolis Marazakis @RiserProject!

@HiPEAC 2026 is next week! With HIGHER presenting at the CONCERTO: Projects Cross-Synergy in Advancing Exascale Platforms and Quantum Computing workshop. 🗓️January 26 – 28, Kraków, Poland higher-project.eu/hipeac26-j…

Last week, we hosted an online workshop in association with @hipeac 'Towards the Next-Gen European Cloud: Open Platforms & Digital Sovereignty.” All recorded presentations are now available here: 👉 youtube.com/@Riser-EU-projec…

💻The 3rd RISER workshop: “Towards the Next-Gen European Cloud: Open Platforms & Digital Sovereignty.” Hosted by HiPEAC. Hear from FORTH , RISE, Semidynamics, SiPearl, & CloudSigma. Find out more and register here 👉 riser-project.eu/towards-the…

🗞️@ICS_FORTH details the integration of the Caliptra Root-of-Trust into OCP-based DC-SCM secure control modules. A major step toward EU-built, open, secure, energy-efficient cloud-to-edge platforms powered by Arm & RISC-V. Read more 👉 higher-project.eu/integratio…

Excited to share that @ICS_FORTH presented at the 7th CANOPIE-HPC Workshop during #SC25 "Evaluating HPK for Running Cloud-Native Workloads on SLURM clusters" - bridging the cloud/HPC divide without partitioning resources. 🔗 riser-project.eu/forth-prese…

🚀 We are advancing modular, secure & energy-efficient European server design integrating SiPearl's Host Processor Modules (HPMs) within OCPs DC-MHS standard to power next-gen AI & HPC infrastructure. 🔗 Read more: tinyurl.com/23xyknuc

@RISE_SICS and @2crsi made an impact at this year's OCP Global Summit, during their session "An Overview and Update of the EU AI Factories Initiative" incl. HIGHER introduction. #OCPSummit25 📽️Find out how to watch the presentation at tinyurl.com/4f3t4xb3

🚗 NEXT WEEK at #RISCVSummit North America: Winning the Future of RISC-V Automotive MCU Through Ecosystem Collaboration and Open Standards For Infineon Technologies — one of the world’s largest automotive semiconductor suppliers — the future of automotive is based on RISC-V. By moving their future MCU lineup to the RISC-V ISA, they’re unlocking flexibility for traditional and AI-driven workloads alike, while leveraging the power of a thriving global ecosystem. Join Infineon alongside VECTOR North America, Green Hills Software, Lauterbach GmbH, and Synopsys Inc. as they explore how collaboration, open standards, and co-development are driving the next era of automotive innovation. Register today > events.linuxfoundation.org/r…

🤔Is this the most complex processor ever conceived in Europe? Learn how SiPearl’s Rhea1 Tape-Out Advances European Sovereignty and Supports HIGHER Project Goals in this post: higher-project.eu/sipearls-r…

👋First up in our "Meet the Consortium" series is our coordinating partner @ICS_FORTH. Learn about one of Europe's leading research centres and their various roles in the HIGHER project here: 🔗 higher-project.eu/meet-our-c…

Join us for the @OpenComputePrj EMEA Community Monthly Call, w/ presentations from Manolis Marazakis (@ICS_FORTH) and Karl Rabe (Co-Lead OCP MDC Group) & founder of Wooden Data Center. 🗓️Online: 16:00-17:00, Tue, 10 Jun. More info: higher-project.eu/open-compu…

🎥 From member keynotes to insightful panel sessions with RISC-V leaders and pioneers, all #RISCVSummitEurope sessions are now available on RISC-V International’s YouTube channel! Missed a few? Now’s your chance to catch up: hubs.la/Q03pM2bn0 📷 Event photos are also live here ➡️ hubs.la/Q03pM0y-0

🔍 Latest on the RISER Project blog: “The Intersection of Open Hardware and European Data Sovereignty.” Open hardware is fast emerging as a key pillar for ensuring transparency, trust, and sovereignty in technology development. 🔗 riser-project.eu/the-interse…

RISER poster on display today | Day 2 of #RISCVSummitEurope. Manolis Marazakis here with Etienne Walter, from the European Processor Initiative (EPI) @EuProcessor. Also, why not swing by @BSC_CNS (booth 27, level S2) & @semidynamics (booth 14, S1)

Day 2 at #RISCVSummitEurope and it's posters all day long! Manolis Marazakis showcasing the HIGHER project with @MetasatProject coordinator Leonidas Kosmidis from @BSC_CNS Also catch @BSC_CNS (booth 27, level S2) & @semidynamics (booth 14, S1)

With over 20 years of experience in open source software and hardware, @Scaleway’s Fabien Piuzzi brings deep expertise in Linux servers, embedded systems, energy efficiency, and RISC-V. 🎤 Don’t miss his talk at #RISCVSummitEurope, starting at 10 a.m., where he’ll dive into: 🔹 Scaleway’s evaluation of RISC-V readiness for server workloads. 🔹 The launch of Scaleway’s first cloud-based RISC-V offering, and the motivation, challenges, and technical efforts behind this initiative. 🔹 The road ahead for RISC-V in datacenters. 📅 Session Title: Cloud-Based RISC-V Servers: How and Why We Built Them — and How You Can Use Them #RISCVEverywhere

🤔 Think you’ve seen the EPI accelerator? Think again. 🫸🏻Come visit us at booth 27 at the #RISCVSummitEurope. 💻 We're showcasing the @eprocessor_eu accelerator in action—this time with a brand-new object recognition use case. Stop by to see it live!

🗼BSC in Paris: Our team is all set at booth 27 to welcome you to the #RISCVSummitEurope in Paris! 💻 Come see our Mondragón motherboard for ASIC testing and a fresh demo of the EPI accelerator—same hardware, new object recognition use case.