Tackling the challenges of node-to-node design migration.
Moving existing IP to a new process node often feels like a massive redesign hurdle.
But with the latest expansion of the collaboration between X-FAB and Cadence, that process is becoming significantly more automated.
The joint solution leverages the Cadence Virtuoso Studio design migration environment, integrated tightly with X-FABβs process-specific PDKs.
Whatβs under the hood?
* Device Mapping: Accurate translation between technologies, backed by X-FABβs deep process knowledge.
* Built-in Optimisation: Tools designed to maintain functionality and performance integrity during the transition.
* Proven Results: Successful proof of concept already demonstrated for 180 nm to 110 nm migration.
For those of us working on custom IC design, this integration means less time spent on manual reverification and more time focusing on innovation.
#CustomIC#CadenceVirtuoso#SemiconductorManufacturing#ProcessNodes#XFAB#ChipLayout#ElectronicsEngineering
I thoughts about code comments. I really hate comments like:
// process all the nodes
processNodes();
but I love and do write comments explaining *why* things are being done
I also will give an explicit source for any textbook math
Barred from #US tech, #Huawei builds #EDA platform of its own
Huawei has reportedly completed work on electronic design automation (EDA) tools for laying out and making chips down to #14nm#processnodes.
bit.ly/3nrLVzE