Engineer, Developer, Researcher,who have been devoted to the research and development of products or projects related to Bluetooth and voice for decades
Joined March 2025
- Tweets 232
- Following 10
- Followers 1
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99 Photos and videos
May 16
Jieli JL USB Updater Download Tool 4.0 Usage Guide | Video Introduction#... youtu.be/NLmQGUZBEuk?si=5mxx… via @YouTube
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May 16
Jieli JL USB Updater Download Tool 4.0 Usage Guide | Video Introduction#... pin.it/5qL2e1DfU via @pinterest
May 12
AC696N GPIO quick reference:
🔧 Direction: gpio_set_direction
🔌 Pull-up: gpio_set_pull_up
💡 Output: gpio_set_output_value
📖 Read: gpio_read
...
Test with a multimeter on the dev board!
#JieLi #AC696N #GPIO #EmbeddedC #Firmware
lnkd.in/gr8hc-Ks
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Apr 8
JL Forced Download Tool JL USB Updater 2.0 Tutorial youtu.be/5rhn090-S0M?si=1gPx… via @YouTube
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Apr 5
AC696N SPI peripherals: Flash, LCD, WS2812
Pro tip: separate CS pins for multiple devices, clock to slowest device.
#JieLi #AC696N #SPI #NorFlash #LCD #WS2812 #EmbeddedSystems
lnkd.in/gQC2sWyA
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Apr 3
Debug like a pro on JL Jieli AC696N:
✅ 1Mbps UART logs (any pin)
✅ Live EQ/DRC tuning over UART – no reflash!
Separate debug & tuning UARTs.
Full guide: [link]
#EmbeddedSystems #Jieli #AC696N #UART
lnkd.in/gQgisRHU
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Mar 30
AC696N timers: sys_timer vs usr_timer
sys_timer = software timer, thread context, power-friendly, wakes from sleep
usr_timer = hardware timer, ISR context, priority=1 blocks sleep (precise), priority=0 allows sleep (may drift)
#JieLi #AC696N #Firmware
lnkd.in/ga9fGFFp
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Mar 29
⚡ Raise core voltage if SD card dual BT effects cause crashes
→ CLOCK_MODE_USR adjust SYSVDD_VOL_SEL
....
Test on dev board first!
#JieLi #AC696N #PowerManagement #EmbeddedSystems #SDCard #Reset
lnkd.in/g7ZYNsBZ
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Mar 26
etting up the JL JieLi AC696N dev environment on Windows? Just 3 steps:
1️⃣ Install Code::Blocks (JieLi version)
2️⃣ Install JieLi toolchain (2.5.2.exe)
3️⃣ Open AC696N_soundbox.cbp & compile
🎧
#JieLi #AC696N #EmbeddedSystems
lnkd.in/ggq9jk6g
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Mar 25
5 minutes with the JL JieLi AC696N dev board:
1️⃣ Power via USB-C → auto Bluetooth mode
2️⃣ Connect to "KT6966B-DEMO-SPK"
3️⃣ Long press 0Ω button to cycle: USB → TF → AUX → BT
#JieLi #AC696N #BluetoothAudio #DevBoard
lnkd.in/gDKhcwgb
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Mar 23
Need a pin reference for the JL JieLi AC6966B dev board? 🗺️
Defaults: KT6966B-DEMO-SPK (audio) / KT6966B-DEMO-BLE
Save this for your next project! 📌
lnkd.in/ec43rwNn
#JieLi #AC696N #Pinout #EmbeddedSystems #BluetoothAudio #HardwareDesign #AC6966B
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Mar 22
Unboxing the JL JieLi AC696N dev board – and it actually comes with everything! 🔌
No hunting for cables. Just start developing. 🎧
#JieLi #AC696N #DevBoard #BluetoothAudio #EmbeddedSystems #Hardware #Unboxing
lnkd.in/g6B7YiKy
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Mar 21
The JL JieLi AC696N series: The cost-effectiveness king of Bluetooth audio chips. 🎧
AC6966B -high-volume small speaker designs and BLE app control.
#JL #JieLi #AC696N #BluetoothAudio #BLE #IoTSolutions lnkd.in/grDfN6ev
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Mar 20
Just dropped Part 1 of the JL JieLi AC696N dev board tutorial series! 🛠️
✔️ Chip features & market positioning
✔️ “Huawei quality, Xiaomi price”
✔️ Dev environment setup in 5 steps
Perfect for embedded devs & audio product designers.
🎥 #JieLi #AC696N #EmbeddedSystems
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Mar 19
JL JieLi AC6966B: A cost-effective Bluetooth 5.1 audio chip for high-volume products. 32‑bit DSP, 128KB RAM, 512KB storage, rich codec support. Perfect for speakers & IoT. 🎧
#AC6966B #JieLi #BluetoothAudio #Embedded #IoT
lnkd.in/ebKK9wyS
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Mar 17
Adding new files to your JL JieLi AC696N project? Here's a quick guide to ensure they compile correctly. 🛠️
#EmbeddedSystems #AC696N #FirmwareDev #JieLi
lnkd.in/gbwRDU9d
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Mar 12
Kickstart your #Bluetooth audio project with the JL AC696N dev board! 🎵
Features:
✅ 32-bit @240MHz, 512KB flash, 128KB RAM
✅ Bluetooth 5.0 (A2DP, HFP, BLE)
✅ U disk/TF/AUX support
✅ Open-source SDK schematics
Perfect for #DIY speakers, headphones, and #IoT devices.#AC696N
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Mar 4
Audio PCB layout tips for Bluetooth chips (JieLi AC695N/AC696N):
🎵 Keep audio traces away from digital.
🎤 MIC ground: MIC → AGND → battery (short).
🔊 Speaker: separate GND/AGND, bypass cap to AGND, short/wide traces.
#PCBDesign #Audio #Bluetooth
lnkd.in/g4b6XKWU
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Mar 1
Key DC-DC layout tips for Bluetooth chips (JieLi AC695N/AC696N):
✔️ Short/wide ground paths
✔️ Inductor close to SW pin, no vias
✔️ Keep away from antenna
✔️ FB sample after output cap
✔️ No changes without test
#PCBDesign #Hardware #Bluetooth #EMI #IoT
lnkd.in/gsPgUKDt
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