The SoC Verification Company: Providing Test Suite Synthesis By Leveraging Portable Stimulus. Get Started With Your Verification GPS.
Joined January 2012
- Tweets 2,372
- Following 355
- Followers 974
- Likes 84
224 Photos and videos
Pinned Tweet
35% growth. 2 years running.
Breker CEO Dave Kelf talks with @SemiWiki on doubling our customer base and why "homebrew" verification is dead.
๐ 50% of global #RISCV cores powered by Breker.
โ
Customers: Doubled, including 2 of the Magnificent 7.
Read :semiwiki.com/eda/breker-veriโฆ
39
๐ Tomorrow in San Jose: Is your team ready for Agentic AI?
Our CEO joins the SEMI ESD Alliance Executive Outlook panel to talk autonomous workflows, traditional EDA, and crushing chip complexity.
๐
June 10 | 5:30 PM ๐ Cadence HQ ๐๏ธ Lock in your spot: semi.org/en/connect/events/eโฆ
9
May 10
Behind every success story, thereโs often a mother, mentor, or caring figure offering support and encouragement along the way. ๐
Today, we celebrate all mothers for their strength, dedication, and positivity.
Happy Motherโs Day! ๐ธ #MothersDay #HappyMothersDay
17
Apr 25
Can #chipverification be 10x faster and 50% cheaperโwithout changing your tools?
Breker, in collaboration with @mooreslabai , is pushing the boundaries with #AI-driven test generation and system-level verification. eejournal.com/article/want-tโฆ
#Semiconductors #SoC #EDA
1
1
32
Apr 11
Dave Kelf via @SemiEngineering breaks down why #RISCV is uniquely qualified for specialized architectures:๐นProcessing integrated into the accelerator ๐น Elimination of data transfer overhead ๐น Major power savings for #LowPower AI semiengineering.com/a-new-erโฆ
1
73
Breker at #RISCVNow by Andes (Apr 20โ21)
"Solving RISC-V Subsystem Verification: AIA, IOMMU, and Other Flash Pointsโ by Adnan Hamid.
Explore advanced approaches to tackle coherency, load-store behavior & performance bottlenecks in complex RISC-V subsystems.riscv-now.com/usa/#overview
55
Jan 30
Does your #RISC-V core really meet the standard? ๐ค
Dave shares key insights on architectural conformance, verification challenges & what โcompliantโ truly means in this @SemiEngineering article. semiengineering.com/does-youโฆ
33
Jan 23
Verifying RISC-V for space: zero defects or mission failure. New @SemiWiki article by @BrekerVerif on the challengesโand solutionsโfor aerospace-grade RISC-V.
semiwiki.com/eda/breker-veriโฆ
#RISCV #SpaceTech #Verification #BrekerSystems
70
Jan 16
In SemiEngineering, Dave Kelf (CEO, Breker) shares why RISC-V is becoming key for AI-driven silicon โ enabling custom, workload-focused designs. A great read on where compute is heading.
semiengineering.com/will-202โฆ
#AI #RISCV #Semiconductors #Breker
54
โCollaboration across design, verification & manufacturing is key to managing semiconductor complexity.โ Great insights from Dave Kelf, CEO @BrekerSystems, on circular EDA collaboration, AIโs role, and future flows in chip design & manufacturing. semi.org/en/blogs/circular-cโฆ
25
14 Dec 2025
Breker Verification Systems highlights how advanced system-level verification is enabling fault-tolerant #RISC-V designs for space and other mission-critical environments.
Read more on the @risc_v blog ๐ riscv.org/blog/breker-risc-vโฆ
26
17 Oct 2025
Breker took a bold and generous step by donating advanced test suite components to RISC-V International in support of future compliance activities.
globenewswire.com/news-releaโฆ
#Breker #RISCV #ChipVerification #RISCVinternational
2
77
8 Oct 2025
๐ ๐๐ฎ๐ฅ๐ฅ ๐ก๐จ๐ฎ๐ฌ๐ ๐๐ญ ๐๐๐๐๐๐๐ ๐๐๐ฌ๐ญ!
Daveโs presentation, โThe Convergence of Semiconductor Manufacturing and Design,โ attracted over 250 professionals passionate about driving innovation in our industry.
#SEMICONWest #Breker #SemiconductorIndustry #ChipDesign
1
54
22 Aug 2025
Can AI really drive spec-based verification without relying on LLMs?
Brekerโs โprincipled AIโ approach offers a fresh perspective on automation, rigor, and reliability in design verification.
๐ Read the full article on SemiWiki: semiwiki.com/artificial-inteโฆ
51
17 Jun 2025
We had a great time at the Breker Seminar on June 11, where cutting-edge verification practices took center stage. More than 50 verification specialists joined us to explore real-world techniques, exchange ideas, and connect over shared challenges in complex design environments.
57
17 Jun 2025
Breker to exhibit at #DAC62 showcasing complex application processor projects across the SoC and RISC-V core verification stack. Join us on June 23-25 at Moscone West San Francisco. Stop by Booth #2520. Send email to info@brekersystems.com
155
2 Jun 2025
Breker will showcase its innovations in #RISC_V SoC verification and their industry-leading #SystemVIP solutions at #DAC on June 22-26 in San Francisco.
Visit our booth 2520.
semiwiki.com/eda/356315-brekโฆ
#breker #eda
1
59
23 May 2025
Breker seminar "Smart Verification Strategies for the Evolving RISC-V Challenge" on June 11, from 10AM - 1:30PM, at Norris Conference Centers Austin.
Register >> RISC-V Seminar: Smart Verification Strategies for the Evolving RISC-V Challenge - Breker Verification Systems
1
106
9 May 2025
Gain insights from industry leaders Adnan Hamid and Dave Kelf in this SemiWiki.com detailed article >> semiwiki.com/eda/breker-veriโฆ
#riscv #risc_v #breker #chipverification #semiwiki
3
66
5 May 2025
Breker is heading to RISC-V Summit in Paris!
Attend our tutorial "๐๐-๐ ๐๐๐ ๐๐๐ซ๐ข๐๐ข๐๐๐ญ๐ข๐จ๐ง ๐จ๐ ๐๐ข๐ซ๐ญ๐ฎ๐๐ฅ๐ข๐ณ๐๐ญ๐ข๐จ๐ง ๐๐ง๐ ๐๐ฒ๐ฉ๐๐ซ๐ฏ๐ข๐ฌ๐จ๐ซ ๐๐ฉ๐๐ซ๐๐ญ๐ข๐จ๐ง ๐๐จ๐ซ ๐๐๐ ๐๐ง๐ ๐๐๐ ๐๐ฅ๐๐ญ๐๐จ๐ซ๐ฆ".
#riscv #RISCVsummitEU
1
54