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Oski Technology @OskiTech

Oski’s unique formal verification services deliver peak sign-off confidence earlier in the semiconductor development cycle.

Joined February 2011
  • Tweets 694
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  • Followers 336
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Oski Technology is hosting the next Decoding Formal Club meeting on April 23rd. Featuring talks by Vikas Minglani of Fungible, Inc., Jing GAO of Qualcomm and author Erik Seligman. For more details and registration see: oskitechnology.com/decoding-…
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Oski Technology is hosting the next Decoding Formal Club meeting on September 25th. Featuring talks by @AMD, @Broadcom and Vigyan Singhal, Founder and Chief Oski. Read more and register here: oskitechnology.com/decoding-…
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"Bugs That Kill" Are simulation-resistant superbugs stifling innovation? semiengineering.com/bugs-tha…

Bugs That Kill

Bugs That Kill Behind closed doors: Semiconductor executives talk about the bugs they fear the most and the problems solving them.

semiengineering.com
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“When you architect the design or make decisions about the blocks and microarchitecture you must understand concurrency versus sequentiality as a first-class decision point”, said Vigyan Singhal of @OskiTech. Read more: semiengineering.com/when-bug…

When Bugs Escape

When Bugs Escape The ability to find bugs has not kept up with the growing complexity of systems. Bugs are more likely to end up in products than ever before.

semiengineering.com
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Can the IC verification challenge be solved by parallelization? Experts from Altair Engineering, @Cadence, @mentor_graphics, @OneSpinSolution, @OskiTech and @ANSYS discuss the answers with @SemiEngineering. semiengineering.com/why-para…

Why Parallelization Is So Hard

Why Parallelization Is So Hard Experts at the Table, part 1: Are we looking to solve the wrong problems? Where does parallelization work best and why.

semiengineering.com
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Simulation-Resistant Superbugs - A Central Theme at DAC. Combating these superbugs is the mission @OskiTech. Case studies by @CaviumInc, @Cisco, @nvidia, and @Qualcomm, Superbug Risk Assessments, Executive Summit to discuss epidemic took place. Read more oskitechnology.com/simulatio…
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@OskiTech Executive Summit @55thDAC hosted senior execs from @AMD, @ArterisIp, @Google, @intel, @CaviumInc, @nvidia, NVXL, @QuantennaCom, @SamsungSemiUS to talk about the Rise Simulation-Resistant Superbugs. Stay tuned for complete report from @brian_esl of @SemiEngineering
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Oski Technology retweeted
SemiWiki@DanielNenni
22 Jun 2018
The #Wolper Method buff.ly/2yuUtvR "If you read around topics in advanced formal #verification you’re likely to run into something called Wolper coloring, or what Vigyan Singhal calls the Wolper method." Read about this on #SemiWiki @OskiTech
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Thank you, Kamal from @OskiTech for showing us how simulation-resistant superbugs are a real problem in today's designs and how Oski Formal can find those bugs early, avoiding critical bug escapes and achieving verification sign-off x.com/mentor_graphics/status…
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Thanks to all the formal verification experts that attended the dinner. Great thought provoking conversation about formal x.com/Chip_Insider/status/10…

Ed Sperling@Chip_Insider
29 Jun 2018
Formal Abstraction And Coverage semiengineering.com/formal-a… #verification #FormalVerification @OskiTech #simulation
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@OskiTech to provide Simulation-Resistant Superbug Assessment at DAC. We'll rank orders design blocks by superbug risk so you can employ the right verification strategy to achieve predictable, efficient, and confident sign-off. Book at oskitechnology.com/dac-super… #formalverification
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Simulation-Resistant Superbugs Are Here. Time to Rethink Your Verification Strategy. Craig Shirley @OskiTech delivers insights on how these new class of bugs affect an array of domains and how simulation and emulation are not be enough to combat them - linkedin.com/pulse/simulatio…
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Kamal Sekhon from @OskiTech delivered Architectural Formal: A 3-Step Guide to a packed house @synopsys Boston SNUG.
Does Power Verification Work? Read @brian_esl article on @SemiEngineering to find out. Roger Sabbagh, VP of Application Engineering @OskiTech shares his thoughts. semiengineering.com/is-power…
Kamal Sekhon from @OskiTech presents at SNUG a 3-step guide to Architectural Formal Verification to address complex system-level challenges event.synopsys.com/ehome/327…
Oski Technology retweeted
SemiWiki@DanielNenni
11 May 2018
Formal Signoff – a #Cisco Perspective buff.ly/2wyG8O0 "The second segment of @OskiTech most recent 'Decoding Formal' event was a talk by Anatoli Sokhatski...on training and methodology development for a structured and scalable approach to formal verification..." #SemiWiki
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Anatoli Sokhatski from @Cisco relays his team's experience with formal sign-off and how @OskiTech Formal expertise and methodology were key to their success. Story on SemiWiki semiwiki.com/forum/content/7… Video: oskitechnology.com/decoding-…
JasperGold Under the Microscope - Kamal Sekhon of @OskiTech delivers @Cadence Boston CDN Live Trip Report on @ADI_News use for static timing analysis deepchip.com/items/0582-05.h… and @Teradyneinc use of for basic formal deepchip.com/items/0582-06.h…
Expanded 55th Design Automation Conference Program Content Drives Unprecedented Exhibition Growth www10.EDACafe.com/nbc/articl… via @EDA_Cafe
Bernard Murphy from SemiWiki (@DanielNenni) recaps @OskiTech Decoding Formal presentation on Meltdown, Spectre, and Formal given by expert cryptologist, Mike Hamburg of @rambusinc semiwiki.com/forum/content/7…
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