PLDA is the leading designer of high-speed interface and interconnect Intellectual Property (IP) supporting protocols such as PCI Express, CXL, CCIX and Gen-Z
Joined March 2013
- Tweets 563
- Following 903
- Followers 672
- Likes 152
200 Photos and videos
PLDA retweeted
29 Oct 2021
In this webinar, memory interface technology expert Frank Ferro will discuss the capabilities of, and design considerations for, the upcoming 3rd- generation of high-bandwidth memory #hbm3 ow.ly/hYc750GB6so
1
1
1
#CXL and IDE: Important Considerations of Protecting High Speed Interconnects brighttalk.com/webcast/18357… via @BrightTALK
1
1
CXL and IDE: Important Considerations of Protecting High Speed Interconnects brighttalk.com/webcast/18357… via @BrightTALK
⌛ Don’t forget the next webinar by @rambusinc and @Siemens on November 9th, 2021!
👇Register now 👇
ow.ly/mbEZ50Gv8rg
#semiconductor #webinar
1
The next generation of #PCIe technology is arriving later this year in time to keep up with the growing demand for #data from 5G, #cloud computing, #AI and other technologies. Read the @ConnSupplier article for details about the PCIe 6.0 specification > bit.ly/3jt2Dup
1
2
💡 Learn with PLDA 💡
Do you know what a CXL.cache is in a #CXL Interface? 🤔
To discover the full definition: plda.com/cxl-glossary/cxlcac…
If you look for technical definitions related to the CXL Protocol, visit PLDA’s CXL #glossary: plda.com/blog/cxl-glossary
#semiconductor
👨🏻🏫 What’s an Electronic Engineer at PLDA?
Discover the interview of an #Electronic #Engineer from PLDA: He tells us about his educational background, how he joined the company, what his current job is and why he likes to work with us!
ow.ly/niGB50FBzRd
#Hardware #Design
Have you watched the new #webinar?
PLDA & Siemens EDA present what you need to know about #PCIe 6.0 to build and verify your design using the updated protocol.
Watch now 👇
ow.ly/owEE50FzR5c
Additional content: ow.ly/THuc50FzR5b
#semiconductor
1
🔔 Have you heard about #PCIe 5.0 Multi-port #Switch?
XpressSWITCH is a customizable, multiport embedded Switch for #PCIe designed for #ASIC and #FPGA implementations.
More information 👇
XpressSWITCH product page: ow.ly/yVCI50FyXf8
#semiconductor
1
Don’t forget the new #webinar!
PLDA & Siemens EDA present what you need to know about #PCIe 6.0 to build and verify your design using the updated protocol.
Register now 👇
ow.ly/Ztcf50Fu8ng
Additional content: ow.ly/kbP050Fu8nf
#semiconductor
New Video!
We demonstrate the PLDA XpressLINK Controller IP for #CXL 2.0 and the CXL.mem protocol used to access Host-managed Device Memory, or HDM.
Watch on YouTube : cutt.ly/6mvAt2u
#design #engineering #datacenter #semiconductor
1
2
PLDA retweeted
27 Jun 2021
While #CXL is written all over Rambus’ acquisition binge, a closer look reveals how the company is assembling #IP assets for #SoC designs @rambusinc @PLDAinc @analogxio @majeedkamran
buff.ly/3qyrL4D
3
4
🔔 Have you heard about #CXL 2.0 Controller with AXI?
XpressLINK-SOC™ is a parameterizable Compute Express Link (CXL) controller Soft #IP designed for #ASIC and #FPGA implementation.
More information 👇
XpressLINK-SOC product page: ow.ly/tVZw50Fp6Dj
#semiconductor
💡 Learn with PLDA 💡
Do you know what a #A2F is in a #CXL Interface? 🤔
To discover the full definition: ow.ly/HEd550FkNWV
If you look for technical definitions related to the CXL Protocol, visit PLDA’s CXL #glossary: ow.ly/sTea50FkNWW
#interface #semiconductor
Have you watched the PCIe 5.0 PLDA demo?
Watch now : ow.ly/2fEm50FkFsC
#semiconductor
In this #webinar, PLDA & Siemens EDA present what you need to know about #PCIe 6.0 to build and verify your design using the updated protocol.
Register now 👇
ow.ly/K9RY50FfEQd
If you are interested in viewing additional content: ow.ly/EMFX50FfEQc
#semiconductor
Have you heard about our Inspector for PCIe 4.0?
INSPECTOR is a #PCIe 4.0 compliant interposer module designed for non-intrusive monitoring, diagnostic, exercising and #debug of PCIe devices.
More information:
•Inspector for PCIe 4.0: ow.ly/vKLF50FfFBp
#semiconductor
2
💡 Discover the 2nd chapter in a series of blogs dedicated to the PCIe 6.0 specification, we discuss the rapid evolution of #PCIe over the past 6 years.
Why have 5.0 and 6.0 come so fast?
We answer it in this blog post :
ow.ly/LLxh50F5xc8
#semiconductor #EDA #IP
PLDA retweeted
3 Jun 2021
1
PLDA retweeted
16 Jun 2021
We are proud to announce the #acquisitions of PLDA and AnalogX as new members of our family.
This step forward allows Rambus to advance new era of Data Center Architecture with CXL™ Memory Interconnect Initiative. ow.ly/3lcO50FbDDn
1
2