😀根据何老师论文,我的总结,核心为3点:
1、芯片层间用金属-金属直接键合,麒麟2026金属键的间距1.5um(第一代保守工艺);
2、芯片各层有独立的校准时钟设计,键合时可以二次校准,保证良率降低成本;
3、EDA设计软件从二维转为三维,3D立体规划/布线,多层时序/RC协同优化;
With HUAWEI Kirin 2026 launching later this year, HUAWEI’s He Tingbo showcases the big leap ahead for semiconductors supported by LogicFolding.