👉 For the first time in Italy, the @risc_v Summit Europe brought international experts to Bologna to discuss this leading standard for processors. 💻 The event offered great networking opportunities, including last night’s dinner at Palazzo Re Enzo. 🔗 bwelcome.it/mice-events

🌳 What if forests could report their own conditions in real time? This morning’s “Internet of Trees” talk explored a vision of low-power, RISC-V-based sensors embedded in forest canopies to capture environmental data directly at the source. More than data collection, it’s about building long-lasting, open systems to better understand and protect ecosystems. #RISCVEverywhere #RISCV #RISCVSummitEurope

Coffee in hand? Before you head back to sessions, take a walk through the poster area. With 71 new posters every day, there's no shortage of innovation and inspiration. What's the most interesting thing you've found so far? 👀 #RISCVSummitEurope #RISCV

Day 2 is underway, and @kasanovic’s State of the Union keynote delivered a clear message: 💪 The state of the union is strong. RISC-V is firmly established in embedded, becoming the standard base for new AI accelerators, and moving closer to widespread adoption in application processors. With server-class RVA23 silicon arriving in 2026 and the Server Platform Specification now ratified, the foundation for the next phase of growth is taking shape. The momentum continues in Bologna 🚀 #RISCVSummitEurope #RISCVEverywhere

What a way to kick off #RISCVSummitEurope 🚀 Day 1 featured discussions on AI and accelerated computing, software ecosystem development, security, embedded systems, automotive applications, and the innovations helping drive RISC-V adoption across industries. Now it's time to keep the conversations going. The Welcome Networking Reception, sponsored by @DeepComputingio, has officially begun! 🍹✨ Whether you're reconnecting with familiar faces or meeting someone for the first time, this is where some of the best Summit conversations happen. See you tomorrow for Day 2.

“RISC-V is happening right now.” 🚀 Fresh off his opening keynote at RISC-V Summit Europe 2026, CEO Andrea Gallo joins James De Vile to unpack the momentum behind the ecosystem — from major investment in SiFive and Axelera AI, to the Server Platform Spec 1.0, RVA23 silicon, and the first RVA23 laptop. A fast-moving conversation on why 2026 is already a defining year for RISC-V. 🎥 Watch the interview > youtu.be/pJIiAnS8N7E?si=Hu16…

Afternoon sessions = unlocked 🔓 Take a look at what's coming up next 👇 Between sessions, be sure to wander over to the Developer Zone, explore the Expo Hall, walk through the poster room, and catch the latest demos in the Demo Theatre. (Trust us, you won't want to spend your entire break checking email.) #RISCVSummitEurope #RISCVEverywhere

"Work upstream early." A simple message from today's keynote by Greg Kroah-Hartman: save time, save money, and avoid costly rework by engaging upstream from the start. Want to learn more? Check out what Greg had to say in our blog from earlier this year! ➡️ riscv.org/blog/risc-v-upstre… #RISCVSummitEurope #RISCVEverywhere

☕️ Morning break = Expo Hall time. The Expo Hall is now open at #RISCVSummitEurope. Meet exhibitors, discover new technologies, and see the latest RISC-V innovations. And don't miss the Developer Zone on your way 👀 #RISCV

RISC-V International CEO, Andrea Gallo kicks off the day with an update full of announcements: - RISC-V market penetration set to go from 2.5% to 33.7% in just 10 years - Microsoft and Tenstorrent upgrade to premier board members of RISC-V international - Server platform specification 1.0: Industry Standard boot architecture and runtime services, portable system software can rely on the platform, interoperability between conforming servers and portable system software, built on top of RVA23 #RISCV #RISCVSummitEurope #RISCVEverywhere

🎉 Summit Day 1 is here! The keynote room is set, attendees are filing in, and the energy is building as we get ready to kick off RISC-V Summit Europe 2026. Take a look below for this morning's schedule and follow along throughout the day for highlights, insights, and announcements from Bologna. #RISCVSummitEurope #RISCV #RISCVEverywhere

The RISC-V Developer Workshops have exceeded all expectations! We sold out, added more seats, and the Hardware Track sold out again. Only a few seats remain for the Software Track. 🎟️ Grab one of the remaining Software Track seats before they're gone! hubs.la/Q04jNKSl0 Want to stay in the loop about future Developer Workshops and other “Learn RISC-V” opportunities? ✍️Sign up for the RISC-V Education Newsletter: hubs.la/Q04jNLPc0

The #RISCVcommunity grows because of people who step up and share their time, knowledge, and energy with others. This year, we welcomed a few new RISC-V Advocates, and they’ve already made a strong impact across the ecosystem. We also want to recognize the advocates who have continued their journey in the program through their ongoing contributions. Being a #RISCVAdvocate is about helping others learn, connect, and get involved. Whether you're looking for local meetups, educational resources, or fellow community members in your region, our advocates are helping make RISC-V more accessible around the world. Find and connect with your local advocate: hubs.la/Q04j0jNb0 Thank you to all of our advocates for everything you do for the RISC-V ecosystem 💙

Before RISC-V Summit starts... Get hands-on with the RISC-V Community! Join us on Monday 8 June in Bologna for a full day of learning, workshops, and community events before RISC-V Summit Europe officially begins. Whether you're new to RISC-V or already building on it, there’s something for you: 🔹 Intro to RISC-V (Open to the public, with no fee) 🕘 9:30–13:00 Come hear about the What, How and Why of RISC-V. Save your seat: hubs.la/Q04h__y00 🔹 HaDes-V Community Challenge (Free Event) 🕑 14:00–17:30 Get hands-on with RISC-V processor design and FPGA-based learning while exploring how modular 32-bit RISC-V microcontrollers run on real hardware. The workshop is free to attend, register here: hubs.la/Q04j0b1F0 🔹 RISC-V Developer Workshops (Almost Sold Out) 🕘 8:30–18:00 Full-day hands-on workshops (€30) Experiment with tools, test what works today, and see how hardware and software can be co-designed. Secure your seat: hubs.la/Q04h_--s0 📍 Bologna • Palazzo dei Congressi Come early. Learn something new. Meet the community before Summit week begins.

Developers, roll up your sleeves! Join us in person for a full day of hands-on #RISCV workshops. Open to all with a €30 pass. #RISCVDeveloperWorkshops 📅 Monday 8 June 2026 ⏰ 8:30 - 18:00 📍 Palazzo dei Congressi, Bologna, Italy 🎟️ €30 pass 👉Seats are limited to ensure maximum interaction. Reserve yours now: hubs.ly/Q04fn-MW0

See the agenda for the #RISCVDeveloperWorkshops 👇 #Software Track: 💻Advanced debug and trace tools for RISC-V architectures Speaker: Maurizio Menegotto | Lauterbach 💻TBA Speakers: Maurizio Menegotto | Lauterbach and Benjamin Cabe | Zephyr Project 💻Hands-on OP-TEE with Andes RISC-V Paul Shan-Chyun Ku | Andes 💻Porting SIMD to RISC-V Vectors Speaker: Daniel Thompson | RISCstar Solutions 💻Hands-on TinyML Deployment on RISC-V: Building an Optimized Edge AI Pipeline Speakers: Niraj Dengale and Frank, Yueh-Feng Lee | Andes Technologies 💻How to: Bringing up ExecuTorch on a RISC-V Microcontroller Speaker: Jeremy Bennett | Embecosm #Hardware Track: 🔧From Open Silicon to Real Hardware: Hands-On RISC-V Development with Zephyr and the Puppy Microcontroller Speakers: Marcelo Knorich Zuffo and Laisa Costa De Biase | Universidade de Sao Paulo 🔧Building an AI Accelerator with High-Level Synthesis Speaker: Werner Bachhuber | Siemens EDA 🔧UCAgent: An End-to-End Agent for Unit-Level Chip Verification Speaker: Junyue Wang | Institute of Computing Technology, CAS 🔧RISC-V Architectural Certification Tests Early Adoption workshop Speakers: Jordan Carlin, David Harris | Harvey Mudd College and Mike Thompson | OpenHW Foundation 🔧Hands-on Introduction to CHERI Speaker: Alfredo Mazzinghi | CHERI Alliance 🔧Introduction to RISC-V in gem5 Speaker: Ivan Fernandez Vega | Barcelona Supercomputing Center 🔧Building a Multi‑Guest Virtualized System with Bao on CVA6 in Automotive Speakers: Joerg Seitte | Infineon Technologies AG and Sandro Pinto | OSYX Technologies Grab your ticket 👉 hubs.ly/Q04fnZ600