A joint effort of @ETH_en, University of Bologna @Unibo partners for Parallel Ultra-Low Power computing. Boldly designing open hardware since '13.

Joined February 2016
2,467 Photos and videos
#RISCVSummitEU in Bologna just finished. It was a pleasure to meet all of you! We are sharing final greetings of Charlie The Bear with Brian "Redbeard" Harrington from RISE and RedHat, Andrea Gallo and Andy Moore from RedHat. See you next year!
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And greetings from our demo team at the #RISCVSummitEU - Margherita, Mattia and Andrea.
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More from #RISCVSummitEU in Bologna. Riccardo presented his work "An Open-Source CVA6S based High-Performance, Cache-Coherent Cluster for 64b Automotive MPUs". Check out his slides: pulp-platform.org/docs/riscv…
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A great overview of Big PULP Chips! Here is Yichao's @yichao_zh #RISCVSummitEU poster "RISC-V Silicon at Scale in Academia: Designing “Big” Open-Source Chips on PULP Platform" pulp-platform.org/docs/riscv…
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We are sharing a couple of photos from Michele's talk "RVEdge-Vision: A Fully Open, Ultra-Efficient On-Device AI Platform for Smart Eyewear" presenting an HW and SW platform that enables rapid prototyping and evaluation of next-generation smart glasses.
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You can now find the posters from the #RISCVSummitEU demos featuring our custom surface electromyography armband & smart glasses GAPses on our website: pulp-platform.org/docs/riscv… & pulp-platform.org/docs/riscv…
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Delighted to be of use! Marco from Luxottica mentioned PULP in his talk "From Eyewear to Silicon: RISC-V for Low-Power AI in Next-Generation Smart Glasses" at the #RISCVSummitEU in Bologna today.
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Here is @MikeRogenmoser with his work "Who Checks the Checker? End-to-End Architectural SEU Tolerance for RISC-V Microcontroller Protection" during the poster session at the #RISCVSummitEU. Find his poster here: pulp-platform.org/docs/riscv…
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Couldn't be there for the poster session at the #RISCVSummitEU in Bologna? Here is @MarcoBertuletti with his work "The Next Generation RISC-V SoCs for Space Communications": pulp-platform.org/docs/riscv…
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You can now find the slides from Luca's #RISCVSummitEU keynote "RISC-V: Enabling Open Physical AI" on our website: pulp-platform.org/docs/riscv…
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PULP Platform retweeted
At the #RISCVsummit @LucaBeniniZhFe is giving a keynote on how the AI race us just beginning and what we can do going into detailed with closely coupled accelerators #RISCV @pulp_platform
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PULP Platform retweeted
Wow, new Chip Picobello by @pulp_platform also using a @OpenHWFdn #CVA6 inside. A chiplet, wow, wow, wow #RISCV
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Charlie The Bear is having a quit chat with old friends at the #RISCVSummitEU in Bologna! Stefan, Christina & Frank, Bjorn, team Mosaic and Michele!
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More from PULP at the poster session today at #RISCVSummitEU in Bologna: @MikeRogenmoser with Who Checks The Checker? Philippe with Open Source SD-Card Host Controller and @MarcoBertuletti with Next Gen #RISCV SOCs for Space Communications. Check out the abstracts below.
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Heads-up for tomorrow - Luca's keynote "RISC-V: Enabling Open Physical AI" is coming up at 10:00 at the #RISCVSummitEU. Charlie The Bear might want to quiz you on the contents🙃 .
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Charlie The Bear is making new acquaintances - Ihsane from OpenHW, Catherine from Uni Sao Paulo, Jerome from Thales and new (hockey?) friends from Tampere! We are hearing that Catherine might be in love with our Bear!
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Even Antmicro and Luca want to play Tetris at our booth at #RISCVSummitEU in Bologna!
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Who wants to play Tetris at PULP's #RISCVSummitEU booth? Florian does!
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Come and take a look, as well. Here is our poster "CVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions" at #RISCVSummitEU in Bologna.
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Today, at the poster session of #RISCVSummitEU see us for "CVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions" with Simone pulp-platform.org/docs/iscas…
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