My second PhD student, Yihao Sun, will be doing his dissertation defense tomorrow at noon Eastern time. Yihao's work has been a true sight to behold. He has papers at ASPLOS, AAAI, NeurIPS, VLDB, among others. This Fall, he starts as faculty at Utah State University! (Zoom link.)

CCF B就最头部专家，那ASPLOS算啥？

MICROSOFT RESEARCHERS BUILT THIS TO TRAIN 530B PARAMETER MODELS Deepspeed is a deep learning optimization library that makes distributed training & inference fast, efficient & actually scalable the kind of tool that changes what "possible" means for ai teams what it does: ▫️ zero redundancy optimizer (zero) - slashes GPU memory usage so you can train massive models without buying a datacenter ▫️ zero-infinity - extends training beyond GPU memory limits using NVMe storage ▫️ 3d parallelism - combines data, pipeline, and tensor parallelism for extreme scale ▫️ deepspeed-moe - efficient mixture-of-experts training and inference ▫️ superoffload - just got an honorable mention at asplos 2026 for large-scale LLM training on superchips it powered bloom (176b), megatron-turing nlg (530b) & models from yandex, amazon & moren integrates natively with huggingface transformers, pytorch lightning & accelerate get started: pip install deepspeed github → github.com/deepspeedai/DeepS…

I rebuilt the @softadastra docs homepage and took clear inspiration from Modular’s docs design. I really like the direction @clattner_llvm and the Modular team are pushing. This talk also shaped how I think about systems, compilers, and hardware/software co-design: ASPLOS Keynote: The Golden Age of Compiler Design in an Era of HW/SW Co-design youtu.be/4HgShra-KnY?si=K3Sp… Softadastra docs: docs.softadastra.com

硅谷最喜欢造神，我感觉这是一种错误的捧杀，死后才有神。 osdi asplos micro这些会议会越来越失去其价值，好不夸张的说这两年的工作都是bullshit。 闷声大发财。

Huge congrats to Dr. Jianan Lu on defending her PhD thesis, "Domain-Aware Data Systems for Modern Analytics"! 🎓 Her thesis revisits a classic tension in systems design: the clean abstractions of strict layering vs. the performance wins of application-specific optimizations. Her answer is domain-aware co-design, demonstrated through two systems aimed squarely at today's analytics problems. Fusion rethinks query pushdown on erasure-coded object storage, exactly the setup powering modern lakehouses. Instead of fragmenting analytics files across storage nodes during coding, killing pushdown efficiency, it co-designs erasure coding and placement around formats like Parquet. This keeps computable units intact and enables fine-grained adaptive pushdown, significantly increasing query performance. Terminus targets graph-based vector search, a workhorse behind RAG and LLM retrieval. Today's indexes burn significant I/O even after the top-ranked results -- the ones that actually matter for RAG -- have already been found. Terminus models per-I/O utility with a rank-weighted function and stops once additional I/Os stop paying off, delivering substantially higher throughput with negligible impact on downstream accuracy. Fusion appeared at ASPLOS '25 and Terminus will be presented at MLSys '26. So proud of what Jianan has built. Next step: Microsoft Research, Asia. 🚀 @Princeton @PrincetonCS @MSFTResearch

AI-Powered Tool Helps Computer Architects Boost Processor Performance | Matt Shipman, NC State News Researchers at North Carolina State University have developed a new AI-assisted tool that helps computer architects boost processor performance by improving memory management. The tool, called CacheMind, is the first computer architecture simulator capable of answering arbitrary, interactive questions about complex hardware-software interactions. The new tool focuses on caches, which are hardware or software components in a system that store data the system may need to use again soon – the idea being that it is faster to retrieve data from the cache than it would be to retrieve the data from elsewhere in the hard drive. However, caches can only store a limited amount of data. Computer architects use two complimentary techniques to improve cache performance: prefetching improves performance by selectively pulling the data most likely to be used into the cache before it is needed; and cache replacement policies are algorithms that determine which data should be removed from the cache in order to bring in new data. “Optimizing a cache replacement policy is challenging, because it can be difficult to determine which blocks of data will be used in the immediate future,” says Kaushal Mhapsekar, first author of a paper on the work and a Ph.D. student at NC State. “Doing this well requires having a good understanding of the fine-grained details about what is happening within the system, such as which instructions rely on data that is not in the cache.” “Currently, computer architects use simulators to estimate how changes to a cache replacement policy will affect system performance,” says Azam Ghanbari, co-author of the paper and a Ph.D. student at NC State. “Outputs from these simulators are aggregated statistics about data-block use. However, these outputs miss those fine-grained details that are essential to identifying the best ways to improve cache replacement policy.” Basically, current approaches to improving cache performance take a trial-and-error approach: run a simulation, look at the numbers, try a change to the prefetcher or replacement policy, run the simulation again, and then see if things got any better. “A better approach is to analyze what is happening, identify patterns that could be improved, determine what is causing those patterns, and then implement a fix,” says Samira Mirbagher Ajorpaz, corresponding author of the paper and an assistant professor of electrical and computer engineering at NC State. “CacheMind was developed to assist with this – it uses causal reasoning, not trial and error, to improve memory management. “Our goal was to develop a user-friendly tool that could help computer architects understand not only what is happening inside their processors, but why,” Mirbagher Ajorpaz says. “And it’s important to note that CacheMind enables arbitrary questions that assist with human reasoning, allowing AI to work alongside humans in CPU design. Building such a tool was challenging because conventional AI models train on Q&A to answer specific questions, not arbitrary ones.” The end result is a “conversational tool” that allows architects to ask natural language questions like, “Why is the memory access associated with PC X causing more evictions?” In proof-of-concept testing, CacheMind improved both cache hit rate and speedup across all test cases. Because CacheMind is the first LLM-based tool designed specifically to address cache replacement policies, the researchers also created a benchmark that can be used to compare CacheMind’s performance to that of future models designed to perform the same task. “We created CacheMindBench, which consists of 100 queries about cache replacement policies with verified answers,” says Bita Aslrousta, co-author of the paper and a Ph.D. student at NC State. “CacheMind is the first tool of its kind, but it will not be the last. CacheMindBench should be useful for tracking the performance of future developments in the field.” “This paper is focused on cache replacement policies, which is the case study we used to demonstrate CacheMind’s potential,” Mirbagher Ajorpaz says. “But the applications of CacheMind and CacheMindBench extend to broader computer architecture questions. “CacheMindBench is the first LLM reasoning benchmark in microarchitecture. Verified reasoning benchmarks are essential because they serve as examples given to LLMs, which enable context learning. The machine learning approach known as ‘few-shot learning’ allows LLMs to respond to arbitrary questions and become grounded. Our benchmark gives LLMs the context they need to mimic reasoning. And this enables them to perform human-like reasoning in fields they have not been pre-trained on. CacheMind works as plug and play on any new configuration, new question, or new software workload challenge without having to be trained on it.” The peer-reviewed paper, “CacheMind: From Miss Rates to Why – Natural-Language, Trace-Grounded Reasoning for Cache Replacement,” was presented March 25 at the ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) in Pittsburgh, Penn. Read more: news.ncsu.edu/2026/04/cachem…

Marvell research has been recognized with a Best Paper Award at the HCDS Workshop, co‑located with ASPLOS. The award honors work by Jing Ding on the Marvell Photonic Fabric Technology Platform, which addresses one of the most fundamental challenges in modern AI systems: scaling memory capacity and bandwidth to meet the demands of large‑scale LLM inference. The paper demonstrates how photonic interconnects and pod‑scale memory sharing can significantly improve time to first token, concurrency, and system utilization across multi‑rack environments. Learn how Photonic Fabric technology is helping bridge the memory hierarchy gap for next‑generation AI infrastructure: mrvl.co/4sFMqCf

🏆 Computer Architecture Hall of Fame — a brand new resource for the community! For the first time ever: 🥇 All four venue Hall of Fames (HPCA, MICRO, ISCA, ASPLOS) unified in one interactive page 🥈 A Combined ranking across all venues — see who dominates multiple HoFs at a glance 🥉 The first-ever IEEE Micro Top Picks Hall of Fame — 22 years of data (2003–2024), 261 Top Picks papers fully compiled 🏅 Honorable Mentions compiled as a separate tab (2014–2024, 130 papers) Also featuring: 🏫 Filter by institution 🔗 DBLP profile links for 250 researchers 📊 Cross-venue paper counts & year-by-year heatmaps 235 researchers. 5 venues. 22 years of Top Picks. 👉 prof-oguzergin.github.io/Com… #ComputerArchitecture #ISCA #MICRO #HPCA #ASPLOS #TopPicks

4月は MICRO, SC, ASPLOS, QCE と身近な国際会議の論文投稿締め切りと講義が集中していて生活リズムが崩壊してしまう

GN CT 🛡️ A lot happened across security, regulation, and institutional crypto this week. From AI risks to major exploits and growing TradFi interest here are the highlights: 🛡️ Thanks to @beincrypto for featuring @CertiK among the top security solutions in Web3 Recognition for our work in formal verification and blockchain security 🛡️ AI agent security gaps highlighted by researcher @hhj4ck Scanning tools aren’t enough without proper runtime permissions and sandboxing, systems remain exposed 🛡️ Fraud tactics evolving fast AI-driven deception and social engineering are increasing risks for everyday users 🛡️ Institutional lines are blurring CBO Jason Jiang shares insights on crypto adoption and evolving security needs with TheStreet 🛡️ Tokenomics innovation continues @KaiaChain proposes performance-based rewards burn mechanism tied to real activity 🛡️ DC Blockchain Summit 2026 spotlight Discussion on running critical crypto infrastructure under pressure as adoption scales 🛡️ Global policy engagement expands CertiK contributes to fraud prevention conversations at the UNODC Global Fraud Summit 🛡️ AI auditing research advances New work from @xy9301 explores the future of AI-driven security analysis 🛡️ Regulatory reality check Security doesn’t end at licensing ongoing monitoring, reassessments, and compliance are mandatory 🛡️ Penetration testing remains critical Identifying vulnerabilities across Web2 Web3 environments before attackers do 🛡️ Exchange & custody risks Security challenges sit at the intersection of infrastructure, private keys, and asset flows 🛡️ Prediction markets under pressure Regulatory scrutiny increasing at both state and federal levels 🛡️ New partnership with @pieverse_io Strengthening trust in the agent economy through secure Skill Store analysis 🛡️ Academic research progress Spoq2 work presented at ASPLOS advancing smart contract verification 📊 Ecosystem & Market Signals 🛡️ Skynet now tracks fundraising, audits, and project health in real time Better visibility for due diligence and early-stage risk assessment 🛡️ Ecosystem dominance shifts Ethereum (45.3%) and BNB Chain (24.5%) both saw slight gains 🛡️ Bitcoin ETF momentum grows $1.17B inflows across 7 consecutive days signal sustained institutional demand 🛡️ Morgan Stanley files for spot Bitcoin ETF (MSBT) TradFi acceleration into crypto continues 🛡️ Institutional trend watch BlackRock: BTC & ETH focus Morgan Stanley: tokenized equities by 2026 Coinbase: shift toward yield strategies 🚨 Security Alerts & Incidents 🛡️ ~$1.76M USDC wallet drain detected Triggered by malicious contract interaction Permit signature 🛡️ ResolvLabs exploit 80M USR minted via vulnerability, ~$26M impact 🛡️ iOS “DarkSword” exploit uncovered Targets seed phrases and wallet credentials through 6 vulnerabilities 🛡️ Account compromise alert @cysic_fdn flagged users advised to ignore suspicious posts 🛡️ 2026 security stats so far: 103 incidents 36 phishing scams ~$480M total losses 🛡️ Key takeaway: As adoption accelerates, security is no longer optional infrastructure it’s the foundation. Stay vigilant. @CertiK @CertiKCommunity @CertiKAlert

Updates from ASPLOS We won Best Paper for our work on item-level intelligence!!! Hosted the Architecture2.0 workshop and heard from some AMAZING profs and students in the community Found out I’m the 2nd worst Top Golfer in the lab (behind @18jeffreyma) Lost $20 in blackjack

Glad that our Spoq2 work on system verification received an Honorable Mention for Best Paper at ASPLOS'26! @CertiK @ColumbiaCompSci

ASPLOSの共著論文が、Honorable Mentions にも選ばれた！ 本当にエライのは共著の人たちだけど、それでも嬉しい。そもそも採択率がめちゃくちゃ低い。

Excited to share that our work SuperOffload received an Honorable Mention for the ASPLOS 2026 Best Paper Award 🎉 Proud of the team for pushing forward system design for large-scale AI. Xinyu gave a great talk presenting the work. In addition, it was also wonderful to spend time with collaborators and the broader community.