Its been 6 months months almost working in telecom, I remember during my initial days at work all these network, RAN, Volte, Ipcore sounded so scary to me. This week I was in call and I was able to establish a very intricate silver ring data schema from alarms to routing for a AI powered autonomous network operation. So much have I learned in this while.

We talk about AI apps, but we don't talk enough about the iron that makes them possible. ZTE just set a new bar: 28.8T per slot at only 0.13 W/G. This isn't just about "faster internet", it’s the silicon foundation for Distributed AI Training and L4 Autonomous Networks. When your IP Core identifies traffic at 95% accuracy in real-time, the "network" stops being a dumb pipe and starts being an intelligent agent.  The future isn't just "AI-assisted"; it’s AI-native at the physical layer. #Networking #AIInfrastructure #IPCore #ZTE #FutureTech

🚀Bandwidth is the foundation, intelligence is the driving force — together they define tomorrow’s IP Core. 🌟 Meet the next-gen IP Core: ✅High Performance: Industry leading 28.8T per slot; Energy consumption ratio as low as 0.13 W/G ✅High Intelligence: 95% traffic identification accuracy; second-level Anti-DDoS protection 🎉Smarter router, Ultra-high energy efficiency. 🌍From core to edge, we’re shaping the intelligent, sustainable networks of the future. #ZTEBroadbandUserCongress #IPCore #IntelligentNetwork #AntiDDoS

i have developed a Verilog IP for a Neural Inference Accelerator prototype that can be trained in python on MINST or any other dataset and classify the image (see video). It misclassified Digit 5 as Digit 6 but looking at the test data I would still call it a success. This design provides a foundational block for on-device AI inference. While currently a prototype, it's a critical step toward a full-featured accelerator. I still have to put it on a FPGA but that would be the next step. Next phase focuses from software side would be on significant performance enhancements, including optimizing the Matrix Multiplication Unit (MMU) and fine-tuning the pipeline for higher throughput. May be multi-staged pipeline version for full fledged accelerator. Excited to share updates as we push its capabilities. #Verilog #HardwareDesign #NeuralAccelerator #Prototype #IPCore #AI #DeepLearning

Love your products, just lived streamed a 6hr hdmi driver build on the GW2A. Trying to create an lvds driver without the ipcore as a challenge. Excited to see what the latest and greatest. A big Thx.

🌍 Meet us this September in Berlin & Amsterdam! 🚀 T2M offers Silicon-Proven and System-Level Semiconductor IP Cores for licensing. #Semiconductor #IPCore #Innovation #T2M #BerlinEvents #AmsterdamEvents #IFA2025 #IBC2025 #IoTTech2025 #TechInnovation #SystemOnChip #FutureOfTech

🎯 Need a custom SoC IP block that fits your design, not the other way around? We tailor, we tune, we optimize. DCD-SEMI = silicon with precision. #CustomIP #ASICDesign #SoC #IPCore

After months of building and listening, we’ve officially entered Q3 on the @StoryProtocol roadmap. This marks the first major chapter post Mainnet where performance meets usability, and the IP economy gets real infrastructure. 🔧 Consensus optimization & snapshotting ⚡ Faster IPcore operations 🧰 IPKit (Beta) register, search & monetize IP in minutes 🔐 Passkey support for passwordless login 📦 Seamless network upgrades with one binary This isn’t just a product update. It’s the groundwork for the programmable IP future. #StoryProtocol @mushy

🔧Introducing T2M’s 12-bit 4GS/s Dual-Channel ADC IP Core 🔧 Dual-Channel | 🌡️ -40°C to 125°C | ⚙️ Background Calibration 📩 Reach out: contact@t-2-m.com | 🌐 t-2-m.com #Semiconductor #IPCore #ADC #4Gsps #12bit #HighSpeed #SoC #5G #RF #T2M #Innovation

🚀 Silicon Proven DisplayPort 1.4 Tx & Rx PHY IP Cores! For further information please visit on: shorturl.at/JSJXO 📺 Compliant with VESA DisplayPort 1.4 🔌 Integrated Tx & Rx PHY IP 🤝 Meet Us At DAC Event 2025 #DisplayPort #PHYIP #Semiconductor #ASICDesign #IPCore

Yep, IPCore designs. Since the beginning all the designs have to be designed independent totally from FPGA vendors. There is so much fun prototyping designs only for FPGAs. The tools and peripherals are great.

وارد کردن 2تا عدد و انتخاب دوتا گزینه در ipcore فقط 1میلیون فرادرس عالیه :))

RaiderChip ハードウェア NPU がサポート対象の AI モデルに Falcon-3 LLM を追加 #IPcore #AI #GenerativeAI #FPGA prompthub.info/78514/

Introducing GEON-SBoot: Secure Boot Hardware Engine IP Core for protection against malicious firmware. Small, fast, and processor-agnostic. Details here: bit.ly/43t5ngr #IPcore #SecureBoot

Now let's do some testing! This is Risc-V and IPcore for telecomm.

Ubilite develops ultra-low-power chipsets with Wi-Fi data rates & range but Bluetooth-like low power consumption. We are pleased to announce they have licensed the BA51 RISC-V Processor core. Press release: bit.ly/3FKgCpU #RISCVEVERYWHERE #RISCVSUMMIT #ipcore #riscv

⏱ the countdown is on! From July 11th to 13th, 2023, Euresys & Sensor to Image will be presenting innovative products &solutions in hall 5.1H, 𝗯𝗼𝗼𝘁𝗵 𝗻𝘂𝗺𝗯𝗲𝗿 𝟱.𝟭𝗔𝟮𝟬𝟭-𝗔. #machinevision #coaxpress #cameralink #machinvevisionsoftware #deeplearning #ipcore

Job Titles: 1. Microwave Back office 2. Site Engineer (FBB Project) 3. Project Coordinator (WL Project) 4. Site Engineer (MW Project- Kano) 5. Site Engineer (MW Project- Asaba) 6. Site Engineer (IPCORE Project) Industry: Telecommunication

📣@FraunhoferIPMS presents their latest controller IP core Media Access Control Security (MACsec) that implements the Layer 2 security standard specified in IEEE 802.1AE. Read more @ ipms.fraunhofer.de/en/press-… #microelectronics #technology #embeddedsystems #IPCore #EPICmembersnews

Matthias is in Nuremberg for @spsmesse show. Meet him on @AMD-@XilinxInc booth - in hall 4, booth 558 - to learn more about our 10G GigE Vision IP Core for Kria KR260 Robotics Starter kit. #machinevision #GigEVision #ipcore