Jan 13
If you want to get up and running with a SoC without a lot of headache I’d recommend LiteX github.com/enjoy-digital/lit…
You can then add peripherals on the bus, memory map CSRs, or custom CPU instructions or whatever you want in verilog, nMigen, Spinal, etc.
4
170
28 Mar 2024
Interesting to see a nMigen version! If I read it correctly, it seems entirely combinational using 32 bits regs. How is Fmax? (my combinational version runs fine but fmax is below 25 MHz).
1
93
28 Mar 2024
this project runs it with no CPU via a manual translation to nMigen github.com/davidar/fpgatoy
1
1
6
753
8 Dec 2023
Question for my FPGA folks: what are the smallest pipelined RISC-V, in term of lines of code? and, is there any CPU written in migen (I mean no nmigen or amaranth)?
5
3
13
2,131
19 Sep 2023
I'm using nMigen (hardware description language for FPGA) interfacing design clues to create bindings for a GPU acceleration library for radio telescopes. What a great time to be alive.
1
2
26
1,415
11 Nov 2022
Python is probably not the natural initial choice to describe RTL, but using it to describe your logic (with Migen, nMigen or Amaranth) has the advantage
of providing you a very powerful pre-processor for your RTL a common language for almost all the tasks of your project.
1
6
26 Oct 2022
Automatic conversion from verilog to CflexHDL: 6X faster simulation than with verilator!
Soruce 8bitworkshop.com/v3.10.0/?pl…
Parsing by the great yosys tool, so I also tested conversion from VHDL and nMigen
Working now on @BrunoLevy01's FemtoRV RISC-V and @matthewvenn's VGA clock
8
12
80
19 Oct 2022
I was looking for a very simple CPU for amaranth/nmigen in this precise moment :-D thanks!
2
1
3
15 Apr 2022
amaranth (ex nmigen @whitequark) support for the QMTech (@zyjnumber1
) EP4CGX150 board has arrived!
github.com/amaranth-communit…
6
7 Mar 2022
That could be interesting.
I am curious about how much nMigen or myHDL can replace traditional tools.
What's their biggest limitation?
1
1
7 Mar 2022
Thinking of using Python for an FPGA book. I started writing with Verilog but it’s a painful language, and I am reconsidering.🙂 Any thoughts on nMigen or MyHDL? Are there other frameworks based on Python? Thanks for any suggestions!
25
13
138
21 Jan 2022
amaranth HDL (alias nmigen) board support for the QMTech Kintex board has arrived. My board is still on the way, so I could not test physically yet, but here it is, ir you want to give it a try:
github.com/amaranth-communit…
2
10
19 Jan 2022
Anyhow, once again looking for a gig doing RTL (Verilog, VHDL, Amaranth/nMigen, Chisel/SpinalHDL) or embedded firmware (C, C , Rust) or Python.
Experienced with ARM Cortex-M (including Nordic nRF52, Kinetis, TI, Renesas, STM32, Atmel SAM)
5/
1
5
6 Jan 2022
See how easy is a LED blink with LiteX, nMigen (using other FPGA board needs just a one line change!)
1
5
5 Jan 2022
Snad dorazim, mohl bych poreferovat amatersky o FPGA, python toolu nMigen a bastleni s tremi ruznymi fpga kity a LVDS LCD
4 Jan 2022
Opět jsem se po roce seznámil zlehka s Verilogem a video 7:1 serializer v #GoWin FPGA mi začíná generovat správný průběh dat. Zatím na každém datovém vodiči mám nastavený 1 bit, abych správně zkontroloval zarovnání framu. Ten začíná v polovině logické 1 hodinového pulzu.
1
1
22 Dec 2021
Hi nMigen-users, nMigen has been renamed to amaranth HDL. Consequently I updated all my projects. I also created a new space on GitHub for the amaranth community to share cores with each other:
github.com/amaranth-communit…
5