1/ @tinytapeout 7 just closed and these two tiles host my design! If it works, it will generate explorable terrain 'voxels' similar to the VoxelSpace Comanche 1992 game engine.
Beginning FPGA Graphics now covers @RadionaOrg#ULX3S (ECP5) in addition to the @DigilentInc Arty / Nexys Video and iCEBreaker. Four years after it began, I continue to update this series to make #FPGA development accessible. 👷 projectf.io/posts/fpga-graph…
It’s a #COMET! ☄️
A half-finished meteor/comet #silicondoodle is placed on the top corner of this vintage IC made by #Digital (#DEC).
COMET is a microprogrammable computer specifically designed to emulate the VAX-11 microarchitecture. VAX (Virtual Address eXtension) was invented in the late 1970s and allowed 16-bit systems to address up to 4GB memory. A variety of chips have this doodle but I am not sure why the comet is not complete on this DC705…
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#FPGA 1st Soft RISC-V Systems Workshop:
Thu Nov. 7 & Fri Nov. 8, 8am-12pm PDT, the @risc_v Soft CPU SIG is hosting a free online workshop & celebration of the vibrant RISC-V soft processor community.
RT/spread the word & join us as attendee or presenter.
sites.google.com/view/srvs-w…
#FPGA One community activity I want, starting in 2024, a regular worldwide online all-welcome @risc_v Soft CPU Workshop. There are so many beautiful FPGA RISC-V cores and systems from industry, academia, hobbyists, and students, worldwide... 9/
Introducing a SKY130 ROM compiler project I've been working on for a while.
youtu.be/MlqDm_Kg0u8
This is just a quick intro to the project with following episodes diving into all the tech details of the design.
1/ If you feel adventurous and want to try both @tinytapeout (make your own chip!) and #Silice I prepared a template for tt09 (61 days to go!).
github.com/sylefeb/tt09-sili…
Be warned: I am waiting for my tt07 and tt08 designs to come back to realize my mistakes 😅.
2/ I followed the @tinytapeout approach of doing the entire synthesis in github actions, with #Silice seamlessly integrated in the mix. Write your code, commit push, and get back an ASIC design ready to submit to Tiny Tapeout !
I've created a series on RISC-V assembler for software developers. The first part introduces #RISCV, then looks at load immediate, addition, & subtraction. I also cover sign extension & pseudoinstructions. No ads, just content 🚀 projectf.io/posts/riscv-arit…
I love fusing retro with modern sounds, and my latest track is no exception. Certain parts of this song were crafted using the #Amiga. Check out the 4-channel version here. If you enjoy it, please support me by adding it on your favorite music service👾
👉 fanlink.tv/magnetique
The first version of GBA core for Tang FPGA is ready 🚀🚀. It's early stage - only some games are working, no save-to-sdcard yet. The project took a while, and I'll blog about the details. For now enjoy this little video and get the core from: github.com/nand2mario/gbatan…
@wren6991 added optimized RISC-V float add/sub/mul to the Raspberry Pi Pico SDK for RP2350 - nice speed up over the stock GCC lib as shown here! More to come no doubt!