506 Photos and videos
I think this might be actually a high possibility, bc screw @Pumpfun. We don’t want crap tokenomics.
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Back shots?
Jun 12
How am I only now finding out about appshots?
I was dragging screenshots into codex live a caveman.
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Who understands this whole thing?
Jun 7
TSMC fumbles Copackaged optics for the Nth time like some fucking donkeys and now the whole industry is limping towards NPO, and the pod bros who price the entire AI TAM off Nvidia’s BOM line items still can’t actually explain what the problem is. So let me do the engineering for you, since clearly nobody on here will.
The bottleneck was never can you make light go through a waveguide. It’s all fucking thermals which is downstream of packaging. Specifically, how do you get a photonic engine onto the same substrate as a switch ASIC or XPU without your yield falling off a cliff and your reliability failing.
TSMC’s answer is CoWoS where they bolt everything onto one big monolithic silicon interposer. Cute, until you hit the reticle limit and start duct-taping interposers together (CoWoS-S, then -R, then -L, soon -PleaseStop). Every chiplet and HBM stack you add to that single interposer compounds your defect probability and one bad die leads to a five-figure package going into the dumpster. CoWoS is thermally retarded and the whole industry knows this and it’s why capacity “can’t expand” and Jensen is acting like a bouncer in the front of a club choosing who gets pass the velvet rope.
There is ONLY one company that will make copackaged optics work and expand in the rack… it’s not Lumentum, it’s not Coherent, it’s fucking INTELLLL.
Intel’s EMIB gets rid of a giant reticle limited interposer and replaces it with a tiny silicon bridge that does the high-density coupling locally, exactly where you need it. You localize the hard part and the thermals in one area and your yield is ridiculously high. Comparing EMIB & CoWoS is so funny cause EMIB is north of 95% yield with like 12 reticle size equivalent package while CoWoS falls off a cliff after 5.5 reticles it’s that bad…now imagine adding thermally sensitive photonics.
People don’t know this but Intel has been doing silicon photonics in-house for ~25 years... In 2024 they showed an Optical I/O chiplet doing 2 Tbps bidirectionally at ~5 pJ/bit, with the PIC and EIC co-packaged right against the ASIC and it’s all because of EMIB. And even more critically than that, they’ve actually run the fiber-attach and reliability/test flow to JEDEC-grade standards already, which everyone hand-waves until their links flap in production.
My prediction is clear: Intel will capture over 90% of the copackaged silicon photonics market in the next five years because there is NO ALTERNATIVE.
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Hyperliquid being centralised closed sourced is the only thing left in the crypto industry that can make a project bullish nowdays
Cant see your code means ur code cant be exploited
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Fuck it I am studying semis
Jun 5
Agreed that 18A is a truly game changer.
The TEM cross-section looks amazing. It shows how the GAA RibbonFET transistors are built and how PowerVia backside power is delivered.
You can see the gate wraps entirely around the horizontally stacked channels on all sides. Based on this picture, we can say the structure has a superior electrical control and reduced leakage. Also note that the PMOS channel width shrinks to 20–22 nm and the NMOS is kept at 30–34 nm. This drastically downsizing components should fit more dies per wafer.
Then the vertical power vias deliver current upward from backside metal to transistors. It looks like the front-side M0 layer is reserved exclusively for signal wiring? If so, it should have the effect of eliminating routing congestion, cutting power loss and enabling higher operating frequencies.
So it looks to me that 18A has compact low-leakage transistors plus freed-up front-side routing space that allow denser chip integration with lower power consumption. Nice job $INTC
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E-TRADE TO ALLOW HOMELESS IN SELECT PARTS OF SOUTHER CALIFORNIA TO BUY SPACE-X IPO NO ACCOUNT MINIMUM REQUIRED
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The Reta series pt.4 🏆🏴☠️🏆🏴☠️🏆🏴☠️🏆🏴☠️
———————————————————
The potassium problem🏴☠️
GLPs increase urinary potassium excretion through the same renal mechanism that drives the sodium dump I spoke about🏴☠️
For me this started showing up around week 6 to 8 as muscle cramps at night🏴☠️
Add reduced food intake and most users are pulling in less potassium from food at the exact moment their kidneys are excreting more of it🏴☠️
The average person needs 3500 to 4700mg of potassium daily and most are barely hitting half of that even before starting a GLP🏴☠️
The symptoms hit quietly🏴☠️
Muscle cramps especially at night🏴☠️
Heart palpitations or a fluttery feeling randomly during the day🏴☠️
Weakness or fatigue that does not match your workout output🏴☠️
Constipation that magnesium alone is not fixing🏴☠️
Brain fog and irritability you cannot pin down🏴☠️
These are not Reta side effects🏴☠️
These are potassium side effects from running Reta without supporting your electrolytes properly🏴☠️
The fix🩹
Track potassium on your BMP every bloodwork pull🏴☠️
Aim for 3500 to 4700mg daily from food first🏴☠️
Real food sources avocado spinach sweet potato banana white potato salmon and beans🏴☠️
Electrolyte supplements that include 400 to 600mg potassium not just sodium🏴☠️
Coconut water 1 to 2 cups daily is an easy add🏴☠️ (Vietnamese harvested are my favorite taste wise)
Do not let a 12 dollar electrolyte upgrade be the reason your heart and muscles are misfiring🏴☠️
🧬🔬
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May 30
It's very telling when the billionaires say things like "oh yeah, AI is gonna make plumbers and electricians more valuable!"
First, it won't. Because there will be many people clamoring for those jobs, which depresses wages.
Second, that is literally them saying that downward social mobility is something to cheer for.
Right, because instead of a cushy six-figure tech job, you're going to be busting ass under people's houses, fixing clogged toilets.
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May 27
There is a brand new chokepoint stack hiding inside Rubin Ultra. Most of the names are micro-caps.
The 800 VDC AI rack architecture has a problem nobody is pricing. Everything between the wall and the GPU die is being rebuilt from scratch. That voltage step-down conversation sounds technical, but behind it is a brand new bottleneck stack with names most generalists have never heard of.
The step-down used to be split across multiple stages of silicon MOSFETs and SiC. At 800 V dropping to about 1 V on a 120 kW rack, that approach no longer works.
The new stack needs wide-bandgap GaN, single-chip high-voltage parts, solid-state circuit breakers, decoupling capacitors that physically fit under the die, and thermal spacers that hold up to the heat density. Each one of those is a separate company.
Power Integrations, ticker $POWI, is the only firm in volume production with 1250V and 1700V single-chip GaN. They are in NVIDIA's 800 VDC whitepaper. Profitable. Around $4 billion MC. Of the 5 names below, this is the only one that already has scale.
Innoscience, ticker 2577 on the Hong Kong exchange, is the largest pure-play GaN IDM at about 30% global share. They own their own fabs. They are the only Chinese name on NVIDIA's 800 VDC supplier list. TSMC is shutting its GaN foundry mid-2027, which makes Innoscience structurally more important to every fabless GaN player.
Ideal Power, ticker $IPWR, builds B-TRAN bidirectional switches positioned as the safety standard for 800 V solid-state circuit breakers. They just signed an LOI for an NVIDIA Rubin Ultra 800 VDC ecosystem prototype. They are pre-revenue and around $70 million market cap. This is a lottery ticket on whether B-TRAN becomes the de facto safety standard.
Smoltek, ticker SMOL on Nasdaq Stockholm, makes CNF-MIM under-die decoupling capacitors with about 50% higher density at 30 to 40% lower cost. The PDN, the power delivery network at the chip level, is one of the binding problems at 800 V. Smoltek is pre-revenue at around $40 to 55 million market cap.
Kostecsys, ticker 355150 on the Korean KOSDAQ, makes thermal spacers for SiC and GaN power modules. They already have a ₩59.4 billion deal with Texas Instruments. They are the least sexy and probably the most "real" of the five.
The reason this stack is worth tracking is the timing.
800 VDC racks are not a 2030 problem, but closer to a 2027 deployment. NVIDIA's Rubin Ultra reference architecture runs on 800 VDC. By the time analysts publish coverage on POWI and Innoscience, the design wins are locked. The 12 to 24 month customer qualification cycle for power semiconductors compresses the window inside which the trade exists.
Half of these names are pre-revenue, so the execution risk is real. The reason they are worth knowing is that they sit on the narrowest physical chokepoint in the entire AI rack power chain, and the chokepoint is being designed around them in real time.
(not financial advice)
May 7
built a dashboard to track ai related bottlenecks: aibottlenecks.app/
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Again please share your tips to defend against these. Having dev machine vs other machine is becoming mandatory.
May 25
🚨 ALERT: TrapDoor malware is targeting crypto and AI developers via a supply chain attack, deploying 34 malicious packages to steal wallets, SSH keys, and API keys.
The malware also injects hidden instructions to hijack AI coding assistants including Claude and Cursor.
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May 24
I dont understand why India is not hiring chinese contractors to upgrade all 8000 towns?
You could legit hire them, get their construction machines, speed run Indian infra game in 5 years!
Why play dumb games and impose sub saharan infra?
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