حقق فريق من طلاب كلية الهندسة بجامعة كفر الشيخ إنجازًا عالميًا جديدًا، بعد فوزه بجائزة “أفضل تطبيق صناعي على مستوى العالم” ضمن منافسات المسابقة الدولية المرموقة VisualSim Global Electronics Hackathon بالولايات المتحدة الأمريكية.
Turned data into clarity.
Won the Visualization Award at VisualSim Electronics Hackathon 2026
Team: Forsaken Apex
Thanks @MirabilisDesign
#Hackathon#DataScience#Visualization#Tech
فاز فريق
Double M
من طلاب كلية الهندسة بجامعة كفر الشيخ
بجائزة " أفضل تطبيق صناعي على مستوى العالم "
ضمن منافسات مسابقة "PISODF" مشروع تخرجهم
VisualSim Global Electronics Hackathon
بأمريكا حيث بدأ مشوار الفريق
بالتصعيد ضمن أفضل 15 فريق عالمي قبل أن يتوج بالجائزة الكبرى🇪🇬
859 participants → 400 active users → 15 finalists
Vote now for the
Engineer’s Choice Award at the VisualSim Electronics Hackathon 2026.
Watch the Finalist Videos
youtube.com/playlist?list=PL…
Cast Your Vote
forms.gle/XkFDJvrVZAdibDkb6
Read more in the captions.
ALT 859 participants → 400 active users → 15 finalists
Vote now for the
Engineer’s Choice Award at the VisualSim Electronics Hackathon 2026.
🎬 Watch the Finalist Videos
👉 https://www.youtube.com/playlist?list=PLizKwf7N88av2rD0dQm0Sxi9nFWZ4DRck
🗳 Cast Your Vote
👉 https://forms.gle/XkFDJvrVZAdibDkb6
🏆 The Engineer’s Choice Award will be decided by the community.
These are not typical hackathon projects. Finalists worked on:
• System architecture modeling
• Protocol validation (UCIe, CXL, PCIe, TSN…)
• Bottleneck detection & debugging
• Data visualization & analysis
Your vote matters.
This is where engineering is heading, from components to complete systems.
Follow Mirabilis Design- https://www.linkedin.com/company/1172959 for final results and more insights on system-level design.
#VisualSim #SystemArchitecture #ElectronicsEngineering #Semiconductors #Hackathon #EngineeringStudents
SmartDV IP is now available as validated system-level models in VisualSim®, starting with CXL. Enables early architectural exploration aligned with production RTL before implementation.
More details: tinyurl.com/3m8ezbym#CXL#EDA#SoCDesign#SmartDV
ALT SmartDV Mirabilis Design = Validated System-Level Models
Join @VisualSim for a Webinar Nov 6 2025 on Power Architecture Exploration of SoC. Study, explore, measure, and optimize power. shorturl.at/q3oKf
ALT Across the globe, data centers and high-performance computing systems are now measured by their power footprint — in megawatts or even gigawatts. Power consumption and thermal design have become the largest cost drivers in compute infrastructure. Balancing performance and power efficiency demands early architectural insight — from SoC and board design to system, network, and software optimization.
Join Cadence and Mirabilis Design for this exclusive webinar to discover how VisualSim Architect enables engineers to Design for Power. Learn how to perform early power estimation, analyze workload behavior, and build optimal power-management strategies across IP, SoC, board, and full system levels.
As a bonus, explore how VisualSim helps you:
Determine cooling requirements under real workloads
Estimate performance across heat and temperature variations
Predict battery lifecycle across environmental conditions
Design for performance. Optimize for power. Model for reality.
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Exciting insights from Mirabilis Design’s Deepak Shankar at #DAC2025! Discover the latest trends in SoC architecture: shift-left verification, AI-driven design, chiplet scalability, and advanced packaging like UCIe. Visit Mirabilis at Booth 2630 to explore VisualSim Architect and system-level simulation! #SoCDesign#EDA#Chipletseeherald.com/section/news/p2…
Designing high-performance ARM-based SoCs comes with unique challenges—balancing power, performance, and efficiency. Join us for a webinar hosted by Mirabilis Design to explore how VisualSim Architect can streamline your power & performance analysis for ARM v8/v9 processors.
This session will unpack how to create high-fidelity system-level models using #VisualSim Architect, focusing on key technical pain points such as debugging latency issues, optimizing throughput, and managing coherence behavior.
Traditional testing methods often fail to uncover performance bottlenecks until it’s too late.
With VisualSim Architect, software architects can:
✅ Simulate real-world scheduling scenarios across CPUs, GPUs, and AI accelerators