I just ran a real-world experiment that left me speechless.
While my team was preparing slides for an upcoming design review, I pointed Claude Code at the SystemVerilog design folder for a certain block and said:
> “Analyze all files — structure, hierarchy, interfaces, functions, registers, operations. Produce full design documents including block diagrams and operational guidelines.”
5 minutes later — it delivered a professional-grade document covering everything: clocking, sub-modules, counter/alarm/sync channels, interrupt sources, register maps, major data paths, and even suggested block diagrams usage guidelines.
This wasn't a toy example. It was real production RTL.
If I had assigned this to a new grad engineer? Months of work countless hours of my time doing mid-review corrections.
This is why the question isn't "Will AI replace engineers?"
The real question is: How can we NOT use AI to 10x our productivity while we focus on the truly hard problems?
The best engineers of the next decade won't be the ones who write every line of RTL themselves. They'll be the ones who know how to direct AI agents to do the heavy lifting — and then apply their judgment, creativity, and system-level insight on top.
The bar just got raised. Dramatically not only SW area but also HW area.
What are you experimenting with in your workflow? Curious to hear from other chip designers, verification folks, and engineering managers.
#ChipDesign #Semiconductors #SystemVerilog #AI #ClaudeCode #HardwareEngineering